Design-Reuse

Xilinx IP Solutions Division Standardizes on Model Technology's Simulation Tool, ModelSim

PORTLAND, Ore.--Nov. 28, 2000--Xilinx, Inc. and Model Technology, a Mentor Graphics company, today announced that the Intellectual Property (IP) Solutions Division of Xilinx has standardized on ...
Design-Reuse

Xilinx and EV Engineering deliver MHz co-simulation with Virtex-II technology

Based on the advanced Virtex-IITM FPGAs ZeBu accelerates co-simulation of designs driven by Verilog/VHDL/C/C++/SystemC testbenches PARIS, France, April 22, 2002 ...
Ars Technica

Open Source VHDL (or similar) CPU Simulation Software

Hey all, my last semester of college we had to develop the microarchitecture for a RISC processor. My group was ultimately unsuccessful (our L2 cache had some serious issues), but I wouldn't mind ...
Electronic Design

VHDL/Verilog Simulator Shows 300% Speed Improvement

The new Active-HDL 4.2 Standard Edition shows a 300% simulation speed improvement over the previous 4.1 version for both VHDL and Verilog designs. Additionally, for Verilog designs, Active-HDL 4.2 ...
EDN

Synopsys speeds Verilog, VHDL simulation

MOUNTAIN VIEW, Calif. — Claiming substantial speedups in its Verilog and VHDL simulation products, Synopsys Inc. this week is announcing releases of its VCS Verilog and Scirocco VHDL simulators. The ...
EDN

Low-cost Verilog simulator debuts

SANTA CRUZ, Calif. — SynaptiCAD, a provider of graphical debugging tools, has announced the release of VeriLogger Extreme, a compiled-code Verilog 2001 simulator. Priced at $4,000 on Windows platforms ...